Why TID pre-stress may change the short-circuit failure path of a SiC MOSFET
The relevant engineering question is not only how much a static parameter shifts after irradiation, but whether the protection logic remains valid when an aged device later encounters a short circuit.
Under the specific reported device and test conditions, the non-irradiated control exhibited gate failure, while samples exposed to 500 krad TID and different gate-bias pre-stress conditions exhibited coupled three-terminal failure.
Limit the conclusion before using it
The result applies to a specific double-trench SiC MOSFET, total dose, bias matrix and finite sample set. It is not a universal law for every SiC process, package or radiation environment.
Implications for engineering verification
Re-validate protection after ageing
Desaturation detection, peak-current thresholds, turn-off delay and soft turn-off should be checked after the relevant pre-stress.
Include operating bias in the matrix
Total dose, dose rate, waveform, duty cycle, bus voltage, temperature and short-circuit conditions belong in the record.
Use failure mode as an additional screen
Threshold shift alone may not capture a transition to a more consequential terminal-failure state.
PHM, dynamic gate-bias scheduling, fail-safe topologies and digital-twin corrections require controlled samples, dosimetry, statistics and system-level validation before use.
PROJECT INTAKE
Turn the topic into a controlled test question
Submit a non-sensitive device category, objective, target dose, bias conditions and schedule for initial review.